Paper:

Rhett Hudson, David Lehn, Peter Athanas, "A Run-Time Reconfigurable
Engine for Image Interpolation," Presented at the FCCM Confrence in
Napa, California, 1998.


Abstract:

Custom Computing Machines (CCMs) have demonstrated significant
performance advantages over general-purpose processors for certain
classes of problems. However, problems can always be found which require
computational resources in excess of those available on a particular
CCM. Exploiting the reconfigurable nature of FPGAs can alleviate this
limitation.  The FPGAs computational resources can be time multiplexed
to allow different portions of the computation to execute in stages.
Intermediate results are saved to memory and passed on to later stages
of the computation. This technique is used in this work to implement an
image interpolation engine on the Xilinx XC6264 Reference Board. The
engine utilizes 2-5-2 splines to take advantage of their computationally
convenient powers-of-two arithmetic.